1. Field of the Invention
Example embodiments of the present general inventive concept relate to a semiconductor device and a method of manufacturing the same, and more particularly, to an integrated circuit (IC) chip including a bump structure and a method of manufacturing the same and a flip chip package having the IC chip and a method of manufacturing the same.
2. Description of the Related Art
Information telecommunication (IT), computer, and display industries have been rapidly developed in recent times and thus electronic components for the IT equipment, the computer systems, and the display apparatuses usually require much higher capacity with much lower power consumption together with requirements of lightness, thinness, shortness, and smallness.
For those reasons, various researches have been conducted in a fabrication process for fabricating an integrated circuit (IC) device and a package process for packaging the IC device in the electronic components. The fabrication process has been developed for increasing an integration degree of the IC device and decreasing power consumption for stably operating the IC device, and the package process has been developed for mounting the IC devices onto a (mounting) board at high density.
In a conventional package process, semiconductor chips fabricated through various unit processes are mounted onto a board in such a way that the semiconductor chips are electrically connected to external electric terminals or devices, and the inside of the semiconductor chips are protected from external environments. For example, a dual inline package process, a small outline package process, a quad flat package process, and a ball grid array technology have been widely suggested for packaging the semiconductor chips onto the board. Recently, a chip scaled package (CSP) process and a direct chip attach (DCA) technology have been suggested in view of the recent requirements of lightness, thinness, shortness and smallness.
A flip chip bonding technology has been widely used for high density packaging of the IC chips onto the board. According to the conventional flip chip bonding technology, the semiconductor chip is usually flipped and the electrode pad of the chip faces the mounting board, and then the IC chip and the board are electrically and mechanically bonded to each other.
Particularly, the electrode pad of the IC chip is connected to a terminal of the mounting board by a metallic connector such as a bump in the conventional flip chip bonding technology, and thus the IC chip and the mounting board are electrically and mechanically connected to each other just by the bump. Therefore, the flip chip bonding technology has strong advantages in that a signal path through which electrical signals travel between the IC chips and the external electric terminals as compared with a wire bonding technology. Thus, a flip chip package in which the IC chips are bonded to the board by the flip chip bonding technology has superior operation characteristics as compared with a wire bonding package in which the IC chips are bonded to the board by the wire bonding technology.
The electrode pad of the IC chip is usually positioned in a pad area of the IC chip and metal wirings of the IC chip are electrically connected to the electrode pad. For example, when the pad area is formed in a central region of the IC chip, a plurality of the electrode pads are arranged in the central region of the IC chip and a plurality of conductive structures for integrated circuits are arranged at both side portions of the electrode pads. The conductive structures and the electrode pads are electrically connected to each other by a wiring, respectively, and thus electrical signals are transferred between the conductive structure and the electrode pad or the conductive structure is electrically grounded to the earth.
A supplemental electrode pad is supplementary used in the flip chip package together with the electrode pad recently. The supplemental electrode pad is positioned over the wirings of the IC chip separated from the pad area of the IC chip in order that an exterior power can be directly applied to the IC chip without passing through the electrode pads. For example, a cell in an area of the IC chip distant from the pad area or another cell of the IC chip in which the power may be consumed relatively high may be directly connected to an exterior power source without passing through the electrode pad, to thereby improve the performance of the flip chip package without any volume increase.
However, there have been problems of process damage to the wirings of the IC chip and mechanical fracture of the flip chip package due to stress concentration to the wirings of the IC chip, since the supplementary electrode pads are positioned over the wirings of the IC chip contrary to the main electrode pads that are arranged in the pad area of the IC chip.
Particularly, when the wiring of the IC chip itself is used as the supplementary electrode pad and a bump structure of the flip chip structure is formed on the wiring, mechanical stresses may be concentrated to the wiring of the IC chip in the process for forming the bump structure. The stress concentration may generate cracks on a surface of the wiring and a peeling failure against the wiring.